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18 Oktober 2009

PLC From Simatic S7

Overview of Bit Logic Instructions

Description

Bit logic instructions work with two digits, 1 and 0. These two digits form the base of a number system called the binary system. The two digits 1 and 0 are called binary digits or bits. In the world of contacts and coils, a 1 indicates activated or energized, and a 0 indicates not activated or not energized.

The bit logic instructions interpret signal states of 1 and 0 and combine them according to Boolean logic. These combinations produce a result of 1 or 0 that is called the “result of logic operation” (RLO).

The logic operations that are triggered by the bit logic instructions perform a variety of functions.

There are bit logic instructions to perform the following functions:

· ---| |--- Normally Open Contact (Address)

· ---| / |--- Normally Closed Contact (Address)

· ---(SAVE) Save RLO into BR Memory

· XOR Bit Exclusive OR

· ---( ) Output Coil

· ---( # )--- Midline Output

· ---|NOT|--- Invert Power Flow



The following instructions react to an RLO of 1:

· ---( S ) Set Coil

· ---( R ) Reset Coil

· SR Set-Reset Flip Flop

· RS Reset-Set Flip Flop



Other instructions react to a positive or negative edge transition to perform the following functions:

· ---(N)--- Negative RLO Edge Detection

· ---(P)--- Positive RLO Edge Detection

· NEG Address Negative Edge Detection

· POS Address Positive Edge Detection



· Immediate Read

· Immediate Write



Contents

Overview of All LAD Instructions


LAD Instructions Sorted According to English Mnemonics (International)
LAD Instructions Sorted According to German Mnemonics (SIMATIC)


LAD Instructions

Bit Logic Instructions
Comparison Instructions
Conversion Instructions
Counter Instructions
Data Block Instructions
Logic Control Instructions
Integer Math Instructions
Floating Point Math Instructions
Move Instructions
Program Control Instructions
Shift Instructions
Rotate Instructions
Status Bit Instructions
Timer Instructions
Word Logic Instructions

Programming Examples

Overview of Programming Examples

Working with Ladder Logic

Types of Blocks
EN/ENO Mechanism
Parameter Transfer
Addressing
Status Word
Data Types

CPU Information

Addresses: CPU-Specific Address Areas
CPU Registers
Accumulators
CPU Resources
Integrated System Functions (SFB, SFC)



Contents

--- A ---
Absolute Address
Absolute Addressing
AC
Accumulator (ACCU)
Actual Parameter
Address
Application
Archive
Array
Assigning Parameters
Assignment List

Associated Value
Authorization
Automation Computer

--- B ---
Backup Memory
Backplane Bus
Backup
BCD
Bit Memory (M)
Block
Block Call
Block Comment
Block Parameter

Block Protection
Block Stack (B Stack)
Block, Message-Type
Breakpoint

--- C ---
C Program
Call Hierarchy
Central Processing Unit (CPU)
CFC
Chart
Clock Memory
Cold Restart

Communication Bus (C Bus)
Communication Function Block (CFB)
Communication Link
Communication Module
Communications Processor (CP)
Compiling
Configuration
Configuring
Connection Table
Constant

Counter (C)
CPU Operating System
Cross-Reference List

--- D ---
Data, Static
Data, Temporary
Data Block (DB)
Data Block Register
Data Type
Data Type, Complex
Data Type, Elementary
Data Type, User-Defined

Data Type Declaration
Declaration Section
Declaration Type
Default Parameter Record
Default Value
Diagnostic Buffer
Diagnostic Event
Diagnostic Event, User-Defined
Diagnostics
Direct Access

Direct Addressing
Download
DP Master
DP Slave

--- E ---
Editor
ERROR-SEARCH Mode

--- F ---
Folder
Formal Parameter
Free-Edit Mode
Function (FC)
Function Block (FB)

Function Block Diagram (FBD)
Function Module (FM)

--- G ---
Gateway
Generate Source File
Global Data Communication

--- H ---
HOLD Mode
Hot Restart
H Station
H System

--- I ---
I/O, Distributed (DP)

I/O, One-Sided
I/O, Redundant
I/O, Single-Channel
I/O, Switched
I/O Access, Direct
I/O Bus
In/Out Parameter
Incremental Input Mode
Input (I)
Input Parameter
Instance

Instance Data Block
Instruction
Interrupt
Interrupt Stack (I Stack)

--- J ---

--- K ---
Keyword

--- L ---
Ladder Logic (LAD)
Library
LINK-UP Mode
Link-Up System Mode
List of Addresses without Symbols

List of Unused Symbols
Load Memory
Load Object
Local Data
Local Data Stack (L Stack)
Logic Block

--- M ---
M7 Program
Master
Master CPU
Memory Area
Memory Card

Memory Reset (MRES)
Message
Message Block

Message Configuration
Message Event
Message Table

Message, Block-Related
Message, Symbol-Related
Mode Selector
Modify Variable
Module Parameter
Monitor Block
Monitor Variable
MPI
MPI Address
MRES
Multipoint Interface (MPI)


--- N ---
Name
Network (Communication)
Network (Program Segment)
Node Address

--- O ---
Object
On-Board Silicon Disk (OSD)
Online Help
Online/Offline
Operating Mode
Operating State

Operating System
Operator Panel (OP)
Operator Station (OS)
Organization Block (OB)
Output (Q)
Output Parameter

--- P ---
Parameter
Parameter, Dynamic
Parameter, Static
Parameter Assignment

Parameter Type
PLC
Priority Class
Process Diagnostics
Process Image
Process-Image Input Table (PII)
Process-Image Output Table (PIQ)
Program
Program Structure
Programmable Control System
Programmable Logic Control

Programmable Logic Controller (PLC)
Programmable Module
Programming Device
Programming Device (SIMATIC PG)
Programming Language
Project

--- Q ---

--- R ---
RAM
Redundant Link
Redundant System Mode
Reference Data

Repeater
Result of Logic Operation (RLO)
Retentive
Rewire
RUN Mode
Rung

--- S ---
S7 Program
S7 User Program
Scan Cycle Checkpoint (SCC)
Scan Cycle Time
SCL
Shared Data

Signal Module (SM)
SIMATIC Manager
Slave
Software
Solo System Mode
Source File
Standby CPU
Start Event
STARTUP Mode
Statement
Statement List (STL)
Station

Station Configuration
STL
STOP Mode
Stop System Mode
Structure (STRUCT)
Structured Control Language (SCL)
Subnet
Substitute Value
Symbol
Symbol Table
Symbolic Addressing
Synchronization Submodule

Syntax Check
System Attribute
System Data Block (SDB)
System Diagnostics
System Error
System Function (SFC)
System Function Block (SFB)
System Memory
System Mode

--- T ---

Task
Text Display Operator Interface
Time Stamp
Timer (T)
Token
Trigger
Trigger Frequency
Trigger Point

--- U ---
UPDATE Mode
Update System Mode
Upload
User-Defined Diagnostics

User Data
User Program

--- V ---
Variable
Variable Declaration Table
Variable Table (VAT)

--- W ---
Warm Restart
Watchdog Time
Work Memory

--- X ---

--- Y ---

--- Z ---

1. Bit Logic Instructions



Overview of Bit Logic Instructions
---| |--- Normally Open Contact (Address)
---| / |--- Normally Closed Contact (Address)
---( ) Output Coil
---( # )--- Midline Output

---( S ) Set Coil
---( R ) Reset Coil

---|NOT|--- Invert Power Flow

---(SAVE) Save RLO into BR Memory

XOR Bit Exclusive OR

---(P)--- Positive RLO Edge Detection
---(N)--- Negative RLO Edge Detection
POS Address Positive Edge Detection
NEG Address Negative Edge Detection

SR Set-Reset Flip Flop
RS Reset-Set Flip Flop

IMD_ READ Immediate Read
IMD_ WRIT Immediate Write


---| |--- Normally Open Contact (Address)


Description

---| |--- (Normally Open Contact) is closed when the bit value stored at the specified
is equal to "1". When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = "1".

Otherwise, if the signal state at the specified
is "0", the contact is open. When the contact is open, power does not flow across the contact and the result of logic operation (RLO) = "0".

When used in series, ---| |--- is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - X X X 1

Example

Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "1" at input I0.2


---| / |--- Normally Closed Contact (Address)


Description

---| / |--- (Normally Closed Contact) is closed when the bit value stored at the specified
is equal to "0". When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = "1".

Otherwise, if the signal state at the specified
is "1", the contact is opened. When the contact is opened, power does not flow across the contact and the result of logic operation (RLO) = "0".

When used in series, ---| / |--- is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - X X X 1

Example



Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "1" at input I0.2


XOR Bit Exclusive OR

For the XOR function, a network of normally open and normally closed contacts must be created as shown below.


Description

XOR (Bit Exclusive OR) creates an RLO of "1" if the signal state of the two specified bits is different.

Example


The output Q4.0 is "1" if (I0.0 = "0" AND I0.1 = "1") OR (I0.0 = "1" AND I0.1 = "0").


--|NOT|-- Invert Power Flow

Symbol

---|NOT|---

Description

---|NOT|--- (Invert Power Flow) negates the RLO bit.



Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - - 1 X -
Example






The signal state of output Q4.0 is "0" if one of the following conditions exists:

The signal state is "1" at input I0.0

Or the signal state is "1" at inputs I0.1 and I0.2.


---( ) Output Coil


Description

---( ) (Output Coil) works like a coil in a relay logic diagram. If there is power flow to the coil (RLO = 1), the bit at location
is set to "1". If there is no power flow to the coil (RLO = 0), the bit at location
is set to "0". An output coil can only be placed at the right end of a ladder rung. Multiple output elements (max. 16) are possible (see example). A negated output can be created by using the ---|NOT|--- (invert power flow) element.

MCR (Master Control Relay) dependency

MCR dependency is activated only if an output coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to an output coil; the addressed bit is set to the current status of power flow. If the MCR is off, a logic "0" is written to the specified address regardless of power flow status.




Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

Example


The signal state of output Q4.0 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "0" at input I0.2.

The signal state of output Q4.1 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "0" at input I0.2 and "1" at input I0.3



If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 and Q4.1 are set according to power flow status as described above.

When MCR is off (=0), Q4.0 and Q4.1 are reset to 0 regardless of power flow.












---( # )--- Midline Output



Description

---( # )--- (Midline Output) is an intermediate assigning element which saves the RLO bit (power flow status) to a specified
. The midline output element saves the logical result of the preceding branch elements. In series with other contacts, ---( # )--- is inserted like a contact. A ---( # )--- element may never be connected to the power rail or directly after a branch connection or at the end of a branch. A negated ---( # )--- can be created by using the ---|NOT|--- (invert power flow) element.


MCR (Master Control Relay) dependency

MCR dependency is activated only if a midline output coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a midline output coil; the addressed bit is set to the current status of power flow. If the MCR is off, a logic "0" is written to the specified address regardless of power flow status.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 1
Example




---( R ) Reset Coil


Description

---( R ) (Reset Coil) is executed only if the RLO of the preceding instructions is "1" (power flows to the coil). If power flows to the coil (RLO is "1"), the specified
of the element is reset to "0". A RLO of "0" (no power flow to the coil) has no effect and the state of the element's specified address remains unchanged. The
may also be a timer (T no.) whose timer value is reset to "0" or a counter (C no.) whose counter value is reset to "0".

MCR (Master Control Relay) dependency

MCR dependency is activated only if a reset coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a reset coil; the addressed bit is reset to the "0" state. If the MCR is off, the current state of the element's specified address remains unchanged regardless of power flow status.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

Example





The signal state of output Q4.0 is reset to "0" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "0" at input I0.2.

If the RLO is "0", the signal state of output Q4.0 remains unchanged.

The signal state of timer T1 is only reset if:

the signal state is "1" at input I0.3.

The signal state of counter C1 is only reset if:

the signal state is "1" at input I0.4.



If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0, T1, and C1 are reset as described above.

When MCR is off, Q4.0, T1, and C1 are left unchanged regardless of RLO state (power flow status).


---( S ) Set Coil

Description

---( S ) (Set Coil) is executed only if the RLO of the preceding instructions is "1" (power flows to the coil). If the RLO is "1" the specified
of the element is set to "1".

An RLO = 0 has no effect and the current state of the element's specified address remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a set coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a set coil; the addressed bit is set to the "1" state. If the MCR is off, the current state of the element's specified address remains unchanged regardless of power flow status.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 X - 0

Example

The signal state of output Q4.0 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1

Or the signal state is "0" at input I0.2.

If the RLO is "0", the signal state of output Q4.0 remains unchanged.



If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 is set as described above.

When MCR is off, Q4.0 is left unchanged regardless of RLO state (power flow status).


RS Reset-Set Flip Flop


Description

RS (Reset-Set Flip Flop) is reset if the signal state is "1" at the R input, and "0" at the S input. Otherwise, if the signal state is "0" at the R input and "1" at the S input, the flip flop is set. If the RLO is "1" at both inputs, the order is of primary importance. The RS flip flop executes first the reset instruction then the set instruction at the specified
, so that this address remains set for the remainder of program scanning.

The S (Set) and R (Reset) instructions are executed only when the RLO is "1". RLO "0" has no effect on these instructions and the address specified in the instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a RS flip flop is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on, the addressed bit is reset to "0" or set to "1" as described above. If the MCR is off, the current state of the specified address remains unchanged regardless of input states.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1
Example



If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output Q4.0 is "0". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory bit M0.0 is reset and output Q4.0 is "1". If both signal states are "0", nothing is changed. If both signal states are "1", the set instruction dominates because of the order; M0.0 is set and Q4.0 is "1".



If the example is within an activated MCR zone:

When MCR is on, Q4.0 is reset or set as described above.

When MCR is off, Q4.0 is left unchanged regardless of input states.


SR Set-Reset Flip Flop


Description

SR (Set-Reset Flip Flop) is set if the signal state is "1" at the S input, and "0" at the R input. Otherwise, if the signal state is "0" at the S input and "1" at the R input, the flip flop is reset. If the RLO is "1" at both inputs, the order is of primary importance. The SR flip flop executes first the set instruction then the reset instruction at the specified
, so that this address remains reset for the remainder of program scanning.

The S (Set) and R (Reset) instructions are executed only when the RLO is "1". RLO "0" has no effect on these instructions and the address specified in the instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a SR flip flop is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on ; the addressed bit is set to "1" or reset to "0" as described above. If the MCR is off, the current state of the specified address remains unchanged regardless of input states.

Status word



BR CC1 CC0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1
Example

If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output Q4.0 is "1". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory bit M0.0 is reset and output Q4.0 is "0". If both signal states are "0", nothing is changed. If both signal states are "1", the reset instruction dominates because of the order; M0.0 is reset and Q4.0 is "0".



If the example is within an activated MCR zone:

When MCR is on, Q4.0 is set or reset as described above.

When MCR is off, Q4.0 is left unchanged regardless of input states.



---( N )--- Negative RLO Edge Detection


Description

---( N )--- (Negative RLO Edge Detection) detects a signal change in the address from "1" to "0" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge memory bit. If the signal state of the address is "1" and the RLO was "0" before the instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior to the instruction is stored in the address.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 x x 1
Example

The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "1" to "0", the program jumps to label CAS1.








---( P )--- Positive RLO Edge Detection


Description

---( P )--- (Positive RLO Edge Detection) detects a signal change in the address from "0" to "1" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge memory bit. If the signal state of the address is "0" and the RLO was "1" before the instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior to the instruction is stored in the address.

Status word



BR CC1 CC0 OV OS OR STA RLO /FC
writes: - - - - - 0 X X 1
Example

The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "0" to "1", the program jumps to label CAS1.


---(SAVE) Save RLO into BR Memory

Symbol

---( SAVE )

Description

---(SAVE) (Save RLO into BR Memory) saves the RLO to the BR bit of the status word. The first check bit /FC is not reset. For this reason, the status of the BR bit is included in the AND logic operation in the next network.

For the instruction "SAVE" (LAD, FBD, STL), the following applies and not the recommended use specified in the manual and online help:
We do not recommend that you use SAVE and then check the BR bit in the same block or in subordinate blocks, because the BR bit can be modified by many instructions occurring inbetween. It is advisable to use the SAVE instruction before exiting a block, since the ENO output (= BR bit) is then set to the value of the RLO bit and you can then check for errors in the block.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: X - - - - - - - -



Example






The status of the rung (=RLO) is saved to the BR bit.

See also:

BR Binary Result Bit (Status Word, Bit 8)


NEG Address Negative Edge Detection


Description

NEG (Address Negative Edge Detection) compares the signal state of with the signal state from the previous scan, which is stored in . If the current RLO state is "1" and the previous state was "0" (detection of rising edge), the RLO bit will be "1" after this instruction.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x 1 x 1

Example

The signal state at output Q4.0 is "1" if the following conditions exist:

· The signal state is "1" at inputs I0.0 and I0.1 and I0.2

· And there is a negative edge at input I0.3

· And the signal state is "1" at input I0.4


POS Address Positive Edge Detection


Description

POS (Address Positive Edge Detection) compares the signal state of with the signal state from the previous scan, which is stored in . If the current RLO state is "1" and the previous state was "0" (detection of rising edge), the RLO bit will be "1" after this instruction.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x 1 x 1

Example



The signal state at output Q4.0 is "1" if the following conditions exist:

· The signal state is "1" at inputs I0.0 and I0.1 and I0.2

· And there is a positive edge at input I0.3

· And the signal state is "1" at input I0.4


Immediate Read

Description

For the Immediate Read function, a network of symbols must be created as shown in the example below.

For time-critical applications, the current state of a digital input may be read faster than the normal case of once per OB1 scan cycle. An Immediate Read gets the state of a digital input from an input module at the time the Immediate Read rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the I memory area is updated with the P memory state.

To perform an immediate read of an input (or inputs) from an input module, use the peripheral input (PI) memory area instead of the input (I) memory area. The peripheral input memory area can be read as a byte, a word, or a double word. Therefore, a single digital input cannot be read via a contact (bit) element.

To conditionally pass voltage depending on the status of an immediate input:

1. A word of PI memory that contains the input data of concern is read by the CPU.

2. The word of PI memory is then ANDed with a constant that yields a non-zero result if the input bit is on ("1").

3. The accumulator is tested for non-zero condition.

Example

Ladder Network with Immediate Read of Peripheral Input I1.1

* MWx has to be specified in order to be able to store the network. x may be any permitted number.



Description of WAND_W instruction:

PIW1 0000000000101010
W#16#0002 0000000000000010
Result 0000000000000010

In this example immediate input I1.1 is in series with I4.1 and I4.5.

The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1"). The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero.


Immediate Write

Description

For the Immediate Write function, a network of symbols must be created as shown in the example below.

For time-critical applications, the current state of a digital output may have to be sent to an output module faster than the normal case of once at the end of the OB1 scan cycle. An Immediate Write writes to a digital output to a input module at the time the Immediate Write rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the Q memory area is updated with the P memory state.

To perform an immediate write of an output (or outputs) to an output module, use the peripheral output (PQ) memory area instead of the output (Q) memory area. The peripheral output memory area can be read as a byte, a word, or a double word. Therefore, a single digital output cannot be updated via a coil element. To write the state of a digital output to an output module immediately, a byte, word, or double word of Q memory that contains the relevant bit is conditionally copied to the corresponding PQ memory (direct output module addresses).



Caution· Since the entire byte of Q memory is written to an output module, all outputs bits in that byte are updated when the immediate output is performed.· If an output bit has intermediate states (1/0) occurring throughout the program that should not be sent to the output module, Immediate Writes could cause dangerous conditions (transient pulses at outputs) to occur.· As a general design rule, an external output module should only be referenced once in a program as a coil. If you follow this design rule, most potential problems with immediate outputs can be avoided.

Example

Ladder network equivalent of Immediate Write to peripheral digital output module 5, channel 1.

The bit states of the addressed output Q byte (QB5) are either modified or left unchanged. Q5.1 is assigned the signal state of I0.1 in network 1. QB5 is copied to the corresponding direct peripheral output memory area (PQB5).

The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1"). The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero.


In this example Q5.1 is the desired immediate output bit.

The byte PQB5 contains the immediate output status of the bit Q5.1.

The other 7 bits in PQB5 are also updated by the MOVE (copy) instruction.


Comparison Instructions


Overview of Comparison Instructions
CMP ? I Compare Integer (==, <>, >, <, >=, <=) CMP ? D Compare Double Integer (==, <>, >, <, >=, <=) CMP ? R Compare Real (==, <>, >, <, >=, <=) Overview of Comparison Instructions Description IN1 and IN2 are compared according to the type of comparison you choose: == IN1 is equal to IN2 <> IN1 is not equal to IN2
> IN1 is greater than IN2
< IN1 is less than IN2 >= IN1 is greater than or equal to IN2
<= IN1 is less than or equal to IN2 If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a rung network by AND if the compare element is used in series, or by OR if the box is used in parallel. The following comparison instructions are available: · CMP ? I Compare Integer · CMP ? D Compare Double Integer · CMP ? R Compare Real CMP ? I Compare Integer Description CMP ? I (Compare Integer) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose. If the comparison is true, the RLO of the function is "1". It is linked to the RLO of the whole rung by AND if the box is used in series, or by OR if the box is used in parallel. Status word BR CC 1 CC 0 OV OS OR STA RLO /FC writes: x x x 0 - 0 x x 1 Example Output Q4.0 is set if the following conditions exist: · There is a signal state of "1" at inputs I0.0 and at I0.1 · AND MW0 >= MW2


CMP ? D Compare Double Integer

Symbols




Description

CMP ? D (Compare Double Integer) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose.

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a rung network by AND if the compare element is used in series, or by OR if the box is used in parallel.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x 0 - 0 x x 1

Example



Output Q4.0 is set if the following conditions exist:

· There is a signal state of "1" at inputs I0.0 and at I0.1

· And MD0 >= MD4

· And there is a signal state of"1" at input I0.2



CMP ? R Compare Real

Description

CMP ? R (Compare Real) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose.

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of the whole rung by AND if the box is used in series, or by OR if the box is used in parallel.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x x x 0 x x 1

Example






Output Q4.0 is set if the following conditions exist:

· There is a signal state of "1" at inputs I0.0 and at I0.1

· And MD0 >= MD4

· And there is a signal state of"1" at input I0.2



Conversion Instructions

BCD_I BCD to Integer
BCD_DI BCD to Double Integer
DI_BCD Double Integer to BCD
I_BCD Integer to BCD

DI_REAL Double Integer to Floating-Point
I_DINT Integer to Double Integer
ROUND Round to Double Integer
TRUNC Truncate Double Integer Part

CEIL Ceiling
FLOOR Floor

INV_I Ones Complement Integer
INV_DI Ones Complement Double Integer
NEG_I Twos Complement Integer
NEG_DI Twos Complement Double Integer
NEG_R Negate Floating-Point Number














BCD_I BCD to Integer


Description

BCD_I (Convert BCD to Integer) reads the contents of the IN parameter as a three-digit, BCD coded number (+/- 999) and converts it to an integer value (16-bit). The integer result is output by the parameter OUT. ENO always has the same signal state as EN.


Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example


If input I0.0 is "1" , then the content of MW10 is read as a three-digit BCD coded number and converted to an integer. The result is stored in MW12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).





I_BCD Integer to BCD


Description

I_BCD (Convert Integer to BCD) reads the content of the IN parameter as an integer value (16-bit) and converts it to a three-digit BCD coded number (+/- 999). The result is output by the parameter OUT. If an overflow occurred, ENO will be "0".

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - x x 0 x x 1

Example

If I0.0 is "1", then the content of MW10 is read as an integer and converted to a three-digit BCD coded number. The result is stored in MW12. The output Q4.0 is "1" if there was an overflow, or the instruction was not executed (I0.0 = 0).






I_DINT Integer to Double Integer


Description

I_DINT (Convert Integer to Double Integer) reads the content of the IN parameter as an integer (16-bit) and converts it to a double integer (32-bit). The result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example

If I0.0 is "1", then the content of MW10 is read as an integer and converted to a double integer. The result is stored in MD12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).








BCD_DI BCD to Double Integer


Description

BCD_DI (Convert BCD to Double Integer) reads the content of the IN parameter as a seven-digit, BCD coded number (+/- 9999999) and converts it to a double integer value (32-bit). The double integer result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example

If I0.0 is "1" , then the content of MD8 is read as a seven-digit BCD coded number and converted to a double integer. The result is stored in MD12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).








DI_BCD Double Integer to BCD


Description

DI_BCD (Convert Double Integer to BCD) reads the content of the IN parameter as a double integer (32-bit) and converts it to a seven-digit BCD coded number (+/- 9999999). The result is output by the parameter OUT. If an overflow occurred, ENO will be "0".


Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - x x 0 x x 1

Example

If I0.0 is "1", then the content of MD8 is read as a double integer and converted to a seven-digit BCD number. The result is stored in MD12. The output Q4.0 is "1" if an overflow occurred, or the instruction was not executed (I0.0 = 0).



DI_REAL Double Integer to Floating-Point


Description

DI_REAL (Convert Double Integer to Floating-Point) reads the content of the IN parameter as a double integer and converts it to a floating-point number. The result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example

If I0.0 is "1", then the content of MD8 is read as an double integer and converted to a floating-point number. The result is stored in MD12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).


INV_I Ones Complement Integer


Description

INV_I (Ones Complement Integer) reads the content of the IN parameter and performs a Boolean XOR function with the hexadecimal mask W#16#FFFF. This instruction changes every bit to its opposite state. ENO always has the same signal state as EN.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example

If I0.0 is "1", then every bit of MW8 is reversed, for example:

MW8 = 01000001 10000001 results in MW10 = 10111110 01111110.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).


INV_DI Ones Complement Double Integer


Description

INV_DI (Ones Complement Double Integer) reads the content of the IN parameter and performs a Boolean XOR function with the hexadecimal mask W#16#FFFF FFFF .This instruction changes every bit to its opposite state. ENO always has the same signal state as EN.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: 1 - - - - 0 1 1 1

Example


If I0.0 is "1", then every bit of MD8 is reversed, for example:

MD8 = F0FF FFF0 results in MD12 = 0F00 000F.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).


NEG_I Twos Complement Integer

Description

NEG_I (Twos Complement Integer) reads the content of the IN parameter and performs a twos complement instruction. The twos complement instruction is equivalent to multiplication by (-1) and changes the sign (for example: from a positive to a negative value). ENO always has the same signal state as EN with the following exception: if the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x x x 0 x x 1

Example

If I0.0 is "1", then the value of MW8 with the opposite sign is output by the OUT parameter to MW10.

MW8 = + 10 results in MW10 = - 10.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

If the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.




NEG_DI Twos Complement Double Integer


Description

NEG_DI (Twos Complement Double Integer) reads the content of the IN parameter and performs a twos complement instruction. The twos complement instruction is equivalent to multiplication by (-1) and changes the sign (for example: from a positive to a negative value). ENO always has the same signal state as EN with the following exception: if the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x x x x x 0 x x 1

Example

If I0.0 is "1", then the value of MD8 with the opposite sign is output by the OUT parameter to MD12.

MD8 = + 1000 results in MD12 = - 1000.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

If the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.



NEG_R Negate Floating-Point Number


Description

NEG_R (Negate Floating-Point) reads the contents of the IN parameter and changes the sign. The instruction is equivalent to multiplication by (-1) and changes the sign (for example: from a positive to a negative value). ENO always has the same signal state as EN.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - - - 0 x x 1

Example

If I0.0 is "1", then the value of MD8 with the opposite sign is output by the OUT parameter to MD12.

MD8 = + 6.234 results in MD12 = - 6.234.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).




ROUND Round to Double Integer


Description

ROUND (Round Double Integer) reads the content of the IN parameter as a floating-point number and converts it to a double integer (32-bit). The result is the closest integer number ("Round to nearest"). If the floating-point number lies between two integers, the even number is returned. The result is output by the parameter OUT. If an overflow occurred ENO will be "0".

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - x x 0 x x 1

Example


If I0.0 is "1", then the content of MD8 is read as a floating-point number and converted to the closest double integer. The result of this "Round to nearest" function is stored in MD12. The output Q4.0 is "1" if an overflow occurred or the instruction was not executed (I0.0 = 0).




TRUNC Truncate Double Integer Part


Description

TRUNC (Truncate Double Integer) reads the content of the IN parameter as a floating-point number and converts it to a double integer (32-bit). The double integer result of the ("Round to zero mode") is output by the parameter OUT. If an overflow occurred, ENO will be "0".

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - x x 0 x x 1

Example



If I0.0 is "1", then the content of MD8 is read as a real number and converted to a double integer. The integer part of the floating-point number is the result and is stored in MD12. The output Q4.0 is "1" if an overflow occurred, or the instruction was not executed (I0.0 = 0).






CEIL Ceiling


Description

CEIL (Ceiling) reads the contents of the IN parameter as a floating-point number and converts it to a double integer (32-bit). The result is the lowest integer which is greater than the floating-point number ("Round to + infinity"). If an overflow occurs, ENO will be "0".

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes*: X - - X X 0 X X 1
writes**: 0 - - - - 0 0 0 1
* Function is executed (EN = 1)
** Function is not executed (EN = 0)

Example


If I0.0 is 1, the contents of MD8 are read as a floating-point number which is converted into a double integer using the function Round. The result is stored in MD12. The output Q4.0 is "1" if an overflow occured or the instruction was not processed (I0.0 = 0).



FLOOR Floor


Description

FLOOR (Floor) reads the content of the IN parameter as a floating-point number and converts it to a double integer (32-bit). The result is the greatest integer component which is lower than the floating-point number ("Round to - infinity"). If an overflow occurred ENO will be "0".

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - x x 0 x x 1

Example


If I0.0 is "1", then the content of MD8 is read as a floating-point number and converted to a double integer by the round to - infinity mode. The result is stored in MD12. The output Q4.0 is "1" if an overflow occurred, or the instruction was not executed (I0.0 = 0).






Counter Instructions

Overview of Counter Instructions
S_CUD Up-Down Counter
S_CU Up Counter
S_CD Down Counter
---( SC ) Set Counter Value
---( CU ) Up Counter Coil
---( CD ) Down Counter Coil


Overview of Counter Instructions

Area in Memory

Counters have an area reserved for them in the memory of your CPU. This memory area reserves one 16-bit word for each counter address. The ladder logic instruction set supports 256 counters.

The counter instructions are the only functions that have access to the counter memory area.

Count Value

Bits 0 through 9 of the counter word contain the count value in binary code. The count value is moved to the counter word when a counter is set. The range of the count value is 0 to 999.

You can vary the count value within this range by using the following counter instructions:

· S_CUD Up-Down Counter

· S_CD Down Counter

· S_CU Up Counter

· ---( SC ) Set Counter Coil

· ---( CU ) Up Counter Coil

· ---( CD ) Down Counter Coil

Bit Configuration in the Counter

You provide a counter with a preset value by entering a number from 0 to 999, for example 127, in the following format: C#127. The C# stands for binary coded decimal format (BCD format: each set of four bits contains the binary code for one decimal value).

Bits 0 through 11 of the counter contain the count value in binary coded decimal format.

The following figure shows the contents of the counter after you have loaded the count value 127, and the contents of the counter cell after the counter has been set.




S_CUD Up-Down Counter


Description

S_CUD (Up-Down Counter) is preset with the value at input PV if there is a positive edge at input S. If there is a 1 at input R, the counter is reset and the count is set to zero. The counter is incremented by one if the signal state at input CU changes from "0" to "1" and the value of the counter is less than "999". The counter is decremented by one if there is a positive edge at input CD and the value of the counter is greater than "0".

If there is a positive edge at both count inputs, both instructions are executed and the count value remains unchanged.

If the counter is set and if RLO = 1 at the inputs CU/CD, the counter will count accordingly in the next scan cycle, even if there was no change from a positive to a negative edge or viceversa.

The signal state at output Q is "1" if the count is greater than zero and "0" if the count is equal to zero.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1


NoteAvoid to use a counter at several program points (risk of counting errors).

Example


If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the signal state of I0.0 changes from "0" to "1", the value of counter C10 will be incremented by one - except when the value of C10 is equal than "999". If I0.1 changes from "0" to "1", C10 is decremented by one - except when the value of C10 is equal to "0". Q4.0 is "1" if C10 is not equal to zero.


S_CU Up Counter


Description

S_CU (Up Counter) is preset with the value at input PV if there is a positive edge at input S.

The counter is reset if there is a "1" at input R and the count value is then set to zero.

The counter is incremented by one if the signal state at input CU changes from "0" to "1" and the value of the counter is less than "999".

If the counter is set and if RLO = 1 at the inputs CU, the counter will count accordingly in the next scan cycle, even if there was no change from a positive to a negative edge or viceversa.

The signal state at output Q is "1" if the count is greater than zero and "0" if the count is equal to zero.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1


Note
Avoid to use a counter at several program points (risk of counting errors).

Example


If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the signal state of I0.0 changes from "0" to "1", the value of counter C10 will be incremented by one - unless the value of C10 is equal to "999". Q4.0 is "1" if C10 is not equal to zero.


S_CD Down Counter


Description

S_CD (Down Counter) is set with the value at input PV if there is a positive edge at input S.

The counter is reset if there is a 1 at input R and the count value is then set to zero.

The counter is decremented by one if the signal state at input CD changes from "0" to "1" and the value of the counter is greater than zero.

If the counter is set and if RLO = 1 at the inputs CD, the counter will count accordingly in the next scan cycle, even if there was no change from a positive to a negative edge or viceversa.

The signal state at output Q is "1" if the count is greater than zero and "0" if the count is equal to zero.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - x x x 1


Note
Avoid to use a counter at several program points (risk of counting errors).

Example


If I0.2 changes from "0" to "1", the counter is preset with the value of MW10. If the signal state of I0.0 changes from "0" to "1", the value of counter C10 will be decremented by one - unless the value of C10 is equal to "0". Q4.0 is "1" if C10 is not equal to zero.



---( SC ) Set Counter Value




Description

---( SC ) (Set Counter Value) executes only if there is a positive edge in RLO. At that time, the preset value transferred into the specified counter.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: x - - - - 0 x - 0

Example


The counter C5 is preset with the value of 100 if there is a positive edge at input I0.0 (change from "0" to "1"). If there is no positive edge, the value of counter C5 remains unchanged.


---( CU ) Up Counter Coil


Description

---( CU ) (Up Counter Coil) increments the value of the specified counter by one if there is a positive edge in the RLO and the value of the counter is less than "999". If there is no positive edge in the RLO or the counter already has the value "999", the value of the counter will be unchanged.


Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

Example



If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the preset value of 100 is loaded to counter C10.

If the signal state of input I0.1 changes from "0" to "1" (positive edge in RLO), counter C10 count value will be incremented by one unless the value of C10 is equal to "999". If there is no positive edge in RLO, the value of C10 will be unchanged.

If the signal state of I0.2 is "1", the counter C10 is reset to "0".


---( CD ) Down Counter Coil



Description

---( CD ) (Down Counter Coil) decrements the value of the specified counter by one, if there is a positive edge in the RLO state and the value of the counter is more than "0". If there is no positive edge in the RLO or the counter has already the value "0", the value of the counter will be unchanged.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - 0 - - 0

Example


If the signal state of input I0.0 changes from "0" to "1" (positive edge in RLO), the preset value of 100 is loaded to counter C10.

If the signal state of input I0.1 changes from "0" to "1" (positive edge in RLO), counter C10 count value will be decremented by one unless the value of C10 is equal to "0". If there is no positive edge in RLO, the value of C10 will be unchanged.

If the count value = 0, then Q4.0 is turned on.

If the signal state of input I0.2 is "1", the counter C10 is reset to "0".





Data Block Instructions

---(OPN) Open Data Block: DB or DI


---(OPN) Open Data Block: DB or DI


Description

---(OPN) (Open a Data Block) opens a shared data block (DB) or an instance data block (DI). The ---(OPN) function is an unconditional call of a data block. The number of the data block is transferred into the DB or DI register. The subsequent DB and DI commands access the corresponding blocks, depending on the register contents.

Status word



BR CC 1 CC 0 OV OS OR STA RLO /FC
writes: - - - - - - - - -

Example



Data block 10 (DB10) is opened. The contact address (DBX0.0) refers to bit zero of data byte zero of the current data record contained in DB10. The signal state of this bit is assigned to the output Q4.0.





Logic Control Instructions


Overview of Logic Control Instructions

Description

You can use logic control instructions in all logic blocks: organization blocks (OBs), function blocks (FBs), and functions (FCs).

There are logic control instructions to perform the following functions:

· ---( JMP )--- Unconditional Jump

· ---( JMP )--- Conditional Jump

· ---( JMPN )--- Jump-If-Not

Label as Address

The address of a Jump instruction is a label. A label consists of a maximum of four characters. The first character must be a letter of the alphabet; the other characters can be letters or numbers (for example, SEG3). The jump label indicates the destination to which you want the program to jump.

Label as Destination

The destination label must be at the beginning of a network. You enter the destination label at the beginning of the network by selecting LABEL from the ladder logic browser. An empty box appears. In the box, you type the name of the label.




---(JMP)--- Unconditional Jump

Symbol

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